Since we cannot say at the subsystem level what the impact to patient safety is, let us err on the side of caution and just consider every cybersecurity issue to pose “unacceptable” risk at the subsystem level. One approach, the most conservative approach, would be to consider every subsystem vulnerability–threat combine to be “unacceptable” at the subsystem level, regardless of the risk value. The only way to assess whether an actual cybersecurity issue in a medical device poses unacceptable patient safety/privacy risk is to assess it at the system level as part of system risk modeling. As discussed before, the impact to safety/privacy cannot be directly assessed at the subsystem level since safety and privacy are system level properties. Is the risk of a subsystem level threat acceptable at the subsystem level? The short answer is, we really cannot say for sure. Subsystem (software and hardware) risk model. By the end of the chapter, the reader is exposed to the basic principles of HLS and its applicability in an ESL design flow.įigure 5.4. This is followed by a detailed description of the key HLS algorithms and exercises designed to reinforce understanding. HLS in the context of an ESL design method, its generic structure, and the basic tasks accomplished by it are described in the chapter. A high-level synthesis tool bridges the gap between an algorithmic description of a design and its structural implementation at the register transfer level, and is the next natural step in design automation, succeeding logic synthesis. An enabling technology for ESL design is high-level synthesis (HLS), also known as behavioral synthesis.
SUB SYSTEM DESIGNER DRIVERS
The main drivers and the basic elements of the emerging ESL design method are discussed in this chapter.
ESL designs can be refined into lower levels of abstraction through a number of steps that gradually map abstract functions into register-transfer level (RTL) components, which is the next level of design abstraction.
Jianwen Zhu, Nikil Dutt, in Electronic Design Automation, 2009 Publisher SummaryĮlectronic system level (ESL) is a design abstraction that enables ease of design capture and early design space exploration of multiple design implementation alternatives.
0 kommentar(er)
